mirror of https://github.com/axmolengine/axmol.git
306 lines
10 KiB
C++
306 lines
10 KiB
C++
#include "config.h"
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#include <arm_neon.h>
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#include <cmath>
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#include <limits>
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#include "alnumeric.h"
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#include "core/bsinc_defs.h"
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#include "defs.h"
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#include "hrtfbase.h"
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struct NEONTag;
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struct LerpTag;
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struct BSincTag;
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struct FastBSincTag;
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#if defined(__GNUC__) && !defined(__clang__) && !defined(__ARM_NEON)
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#pragma GCC target("fpu=neon")
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#endif
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namespace {
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inline float32x4_t set_f4(float l0, float l1, float l2, float l3)
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{
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float32x4_t ret{vmovq_n_f32(l0)};
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ret = vsetq_lane_f32(l1, ret, 1);
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ret = vsetq_lane_f32(l2, ret, 2);
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ret = vsetq_lane_f32(l3, ret, 3);
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return ret;
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}
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constexpr uint FracPhaseBitDiff{MixerFracBits - BSincPhaseBits};
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constexpr uint FracPhaseDiffOne{1 << FracPhaseBitDiff};
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inline void ApplyCoeffs(float2 *RESTRICT Values, const size_t IrSize, const HrirArray &Coeffs,
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const float left, const float right)
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{
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float32x4_t leftright4;
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{
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float32x2_t leftright2{vmov_n_f32(left)};
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leftright2 = vset_lane_f32(right, leftright2, 1);
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leftright4 = vcombine_f32(leftright2, leftright2);
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}
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ASSUME(IrSize >= MinIrLength);
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for(size_t c{0};c < IrSize;c += 2)
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{
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float32x4_t vals = vld1q_f32(&Values[c][0]);
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float32x4_t coefs = vld1q_f32(&Coeffs[c][0]);
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vals = vmlaq_f32(vals, coefs, leftright4);
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vst1q_f32(&Values[c][0], vals);
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}
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}
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} // namespace
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template<>
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float *Resample_<LerpTag,NEONTag>(const InterpState*, float *RESTRICT src, uint frac,
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uint increment, const al::span<float> dst)
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{
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const int32x4_t increment4 = vdupq_n_s32(static_cast<int>(increment*4));
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const float32x4_t fracOne4 = vdupq_n_f32(1.0f/MixerFracOne);
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const int32x4_t fracMask4 = vdupq_n_s32(MixerFracMask);
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alignas(16) uint pos_[4], frac_[4];
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int32x4_t pos4, frac4;
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InitPosArrays(frac, increment, frac_, pos_);
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frac4 = vld1q_s32(reinterpret_cast<int*>(frac_));
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pos4 = vld1q_s32(reinterpret_cast<int*>(pos_));
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auto dst_iter = dst.begin();
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for(size_t todo{dst.size()>>2};todo;--todo)
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{
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const int pos0{vgetq_lane_s32(pos4, 0)};
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const int pos1{vgetq_lane_s32(pos4, 1)};
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const int pos2{vgetq_lane_s32(pos4, 2)};
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const int pos3{vgetq_lane_s32(pos4, 3)};
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const float32x4_t val1{set_f4(src[pos0], src[pos1], src[pos2], src[pos3])};
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const float32x4_t val2{set_f4(src[pos0+1], src[pos1+1], src[pos2+1], src[pos3+1])};
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/* val1 + (val2-val1)*mu */
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const float32x4_t r0{vsubq_f32(val2, val1)};
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const float32x4_t mu{vmulq_f32(vcvtq_f32_s32(frac4), fracOne4)};
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const float32x4_t out{vmlaq_f32(val1, mu, r0)};
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vst1q_f32(dst_iter, out);
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dst_iter += 4;
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frac4 = vaddq_s32(frac4, increment4);
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pos4 = vaddq_s32(pos4, vshrq_n_s32(frac4, MixerFracBits));
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frac4 = vandq_s32(frac4, fracMask4);
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}
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if(size_t todo{dst.size()&3})
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{
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src += static_cast<uint>(vgetq_lane_s32(pos4, 0));
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frac = static_cast<uint>(vgetq_lane_s32(frac4, 0));
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do {
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*(dst_iter++) = lerp(src[0], src[1], static_cast<float>(frac) * (1.0f/MixerFracOne));
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frac += increment;
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src += frac>>MixerFracBits;
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frac &= MixerFracMask;
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} while(--todo);
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}
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return dst.data();
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}
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template<>
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float *Resample_<BSincTag,NEONTag>(const InterpState *state, float *RESTRICT src, uint frac,
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uint increment, const al::span<float> dst)
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{
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const float *const filter{state->bsinc.filter};
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const float32x4_t sf4{vdupq_n_f32(state->bsinc.sf)};
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const size_t m{state->bsinc.m};
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src -= state->bsinc.l;
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for(float &out_sample : dst)
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{
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// Calculate the phase index and factor.
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const uint pi{frac >> FracPhaseBitDiff};
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const float pf{static_cast<float>(frac & (FracPhaseDiffOne-1)) * (1.0f/FracPhaseDiffOne)};
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// Apply the scale and phase interpolated filter.
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float32x4_t r4{vdupq_n_f32(0.0f)};
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{
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const float32x4_t pf4{vdupq_n_f32(pf)};
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const float *fil{filter + m*pi*4};
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const float *phd{fil + m};
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const float *scd{phd + m};
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const float *spd{scd + m};
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size_t td{m >> 2};
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size_t j{0u};
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do {
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/* f = ((fil + sf*scd) + pf*(phd + sf*spd)) */
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const float32x4_t f4 = vmlaq_f32(
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vmlaq_f32(vld1q_f32(&fil[j]), sf4, vld1q_f32(&scd[j])),
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pf4, vmlaq_f32(vld1q_f32(&phd[j]), sf4, vld1q_f32(&spd[j])));
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/* r += f*src */
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r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
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j += 4;
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} while(--td);
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}
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r4 = vaddq_f32(r4, vrev64q_f32(r4));
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out_sample = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
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frac += increment;
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src += frac>>MixerFracBits;
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frac &= MixerFracMask;
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}
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return dst.data();
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}
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template<>
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float *Resample_<FastBSincTag,NEONTag>(const InterpState *state, float *RESTRICT src, uint frac,
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uint increment, const al::span<float> dst)
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{
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const float *const filter{state->bsinc.filter};
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const size_t m{state->bsinc.m};
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src -= state->bsinc.l;
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for(float &out_sample : dst)
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{
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// Calculate the phase index and factor.
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const uint pi{frac >> FracPhaseBitDiff};
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const float pf{static_cast<float>(frac & (FracPhaseDiffOne-1)) * (1.0f/FracPhaseDiffOne)};
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// Apply the phase interpolated filter.
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float32x4_t r4{vdupq_n_f32(0.0f)};
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{
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const float32x4_t pf4{vdupq_n_f32(pf)};
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const float *fil{filter + m*pi*4};
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const float *phd{fil + m};
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size_t td{m >> 2};
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size_t j{0u};
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do {
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/* f = fil + pf*phd */
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const float32x4_t f4 = vmlaq_f32(vld1q_f32(&fil[j]), pf4, vld1q_f32(&phd[j]));
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/* r += f*src */
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r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
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j += 4;
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} while(--td);
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}
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r4 = vaddq_f32(r4, vrev64q_f32(r4));
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out_sample = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
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frac += increment;
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src += frac>>MixerFracBits;
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frac &= MixerFracMask;
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}
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return dst.data();
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}
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template<>
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void MixHrtf_<NEONTag>(const float *InSamples, float2 *AccumSamples, const uint IrSize,
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const MixHrtfFilter *hrtfparams, const size_t BufferSize)
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{ MixHrtfBase<ApplyCoeffs>(InSamples, AccumSamples, IrSize, hrtfparams, BufferSize); }
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template<>
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void MixHrtfBlend_<NEONTag>(const float *InSamples, float2 *AccumSamples, const uint IrSize,
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const HrtfFilter *oldparams, const MixHrtfFilter *newparams, const size_t BufferSize)
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{
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MixHrtfBlendBase<ApplyCoeffs>(InSamples, AccumSamples, IrSize, oldparams, newparams,
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BufferSize);
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}
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template<>
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void MixDirectHrtf_<NEONTag>(FloatBufferLine &LeftOut, FloatBufferLine &RightOut,
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const al::span<const FloatBufferLine> InSamples, float2 *AccumSamples,
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float *TempBuf, HrtfChannelState *ChanState, const size_t IrSize, const size_t BufferSize)
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{
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MixDirectHrtfBase<ApplyCoeffs>(LeftOut, RightOut, InSamples, AccumSamples, TempBuf, ChanState,
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IrSize, BufferSize);
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}
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template<>
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void Mix_<NEONTag>(const al::span<const float> InSamples, const al::span<FloatBufferLine> OutBuffer,
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float *CurrentGains, const float *TargetGains, const size_t Counter, const size_t OutPos)
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{
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const float delta{(Counter > 0) ? 1.0f / static_cast<float>(Counter) : 0.0f};
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const auto min_len = minz(Counter, InSamples.size());
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const auto aligned_len = minz((min_len+3) & ~size_t{3}, InSamples.size()) - min_len;
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for(FloatBufferLine &output : OutBuffer)
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{
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float *RESTRICT dst{al::assume_aligned<16>(output.data()+OutPos)};
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float gain{*CurrentGains};
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const float step{(*TargetGains-gain) * delta};
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size_t pos{0};
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if(!(std::abs(step) > std::numeric_limits<float>::epsilon()))
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gain = *TargetGains;
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else
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{
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float step_count{0.0f};
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/* Mix with applying gain steps in aligned multiples of 4. */
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if(size_t todo{(min_len-pos) >> 2})
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{
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const float32x4_t four4{vdupq_n_f32(4.0f)};
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const float32x4_t step4{vdupq_n_f32(step)};
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const float32x4_t gain4{vdupq_n_f32(gain)};
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float32x4_t step_count4{vdupq_n_f32(0.0f)};
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step_count4 = vsetq_lane_f32(1.0f, step_count4, 1);
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step_count4 = vsetq_lane_f32(2.0f, step_count4, 2);
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step_count4 = vsetq_lane_f32(3.0f, step_count4, 3);
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do {
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const float32x4_t val4 = vld1q_f32(&InSamples[pos]);
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float32x4_t dry4 = vld1q_f32(&dst[pos]);
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dry4 = vmlaq_f32(dry4, val4, vmlaq_f32(gain4, step4, step_count4));
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step_count4 = vaddq_f32(step_count4, four4);
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vst1q_f32(&dst[pos], dry4);
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pos += 4;
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} while(--todo);
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/* NOTE: step_count4 now represents the next four counts after
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* the last four mixed samples, so the lowest element
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* represents the next step count to apply.
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*/
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step_count = vgetq_lane_f32(step_count4, 0);
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}
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/* Mix with applying left over gain steps that aren't aligned multiples of 4. */
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for(size_t leftover{min_len&3};leftover;++pos,--leftover)
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{
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dst[pos] += InSamples[pos] * (gain + step*step_count);
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step_count += 1.0f;
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}
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if(pos == Counter)
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gain = *TargetGains;
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else
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gain += step*step_count;
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/* Mix until pos is aligned with 4 or the mix is done. */
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for(size_t leftover{aligned_len&3};leftover;++pos,--leftover)
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dst[pos] += InSamples[pos] * gain;
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}
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*CurrentGains = gain;
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++CurrentGains;
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++TargetGains;
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if(!(std::abs(gain) > GainSilenceThreshold))
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continue;
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if(size_t todo{(InSamples.size()-pos) >> 2})
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{
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const float32x4_t gain4 = vdupq_n_f32(gain);
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do {
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const float32x4_t val4 = vld1q_f32(&InSamples[pos]);
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float32x4_t dry4 = vld1q_f32(&dst[pos]);
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dry4 = vmlaq_f32(dry4, val4, gain4);
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vst1q_f32(&dst[pos], dry4);
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pos += 4;
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} while(--todo);
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}
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for(size_t leftover{(InSamples.size()-pos)&3};leftover;++pos,--leftover)
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dst[pos] += InSamples[pos] * gain;
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}
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}
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